Field of the Invention
The invention relates in general to a data decryption circuit and an associated method, and more particularly, to a data decryption circuit that utilizes both software and hardware and a method thereof.
Description of the Related Art
FIG. 1 shows a schematic diagram of a High-bandwidth Digital Content Protection (HDCP) data decryption process. FIG. 2 shows a schematic diagram of a conventional transport stream (TS) packet. As shown in FIG. 2, a TS packet 200 includes a TS header, a packetized elementary stream (PES) header, and an elementary stream (ES), or referred to as a payload. In the HDCP standard, the TS header includes a flag named as a payload unit start indicator for indicating whether a TS packet includes a PES header. The PES header includes private data, which is utilized for decryption and mainly includes streamCtr data and inputCtr data. It should be noted that, not all TS packets include the PES header. Whether a TS packet includes the PES header is determined according to the payload unit start indicator flag. When a TS packet includes the PES header, the inputCtr data may be retrieved from the private data to perform a decryption process. When a TS packet does not include the PES header, the inputCtr data may be concluded according to a data block (e.g., 16 bytes) currently being decrypted since the inputCtr data increases by a unit of a data block of the HDCP data decrypted each time. Referring to FIG. 1, an exclusive or (XOR) operation is performed on the 32-bit streamCtr and the lower 32 bits of the 64-bit pseudo-random number riv, and a result of the XOR operation is combined with the higher 32 bits of the pseudo-random number riv, to retrieve 64-bit intermediate data, which is then combined with the 64-bit inputCtr data to form 128-bit intermediate data p. An XOR operation is performed on a 128-bit session key Ks and a 128-bit constant IC128, and an advanced encryption standard (AES) operation is performed on a result of the XOR operation and the intermediate data p to generate a 128-bit key. By performing an XOR operation on the encrypted data of one data block length (128 bits or 16 bytes) and the key, original data of the encrypted data (including 128-bit or 16-byte data) can be retrieved. The pseudo-random number riv, and the session key Ks are results of communications between a transmitter and a receiver of TS data.
As shown in FIG. 2, the length of one TS packet is 188 bytes, with the length of the TS header being 4 bytes, and the PES data being present or absent and having no fixed length. As previously described, whether the PES header is present can be determined by the payload unit start indicator flag. If the PES header is present, the PES header includes length information of the PES header itself. Therefore, the length of the payload is the remaining data length of the length of the TS packet (188 bytes) minus the length of the TS header (4 bytes) and the length of the PES header (if present). As previously stated, the data block of HDCP data decrypted each time is 16 bytes, the payload may include several data blocks, and the amount of data of the payload may not be an integral multiple of 16 bytes. As a result, in a data decryption process, a small segment of residual data (less than 16 bytes) may be remained from one TS packet. Such residual data yet to be decrypted is combined with a part of the data of the payload in a next TS packet to form a complete data block that can then be processed by an HDCP data decryption process.
If the HDCP decryption process in FIG. 1 is entirely performed by hardware, due to the lack of flexibilities in hardware, the combining process for the payloads originally belonged to two different TS packets inevitably causes hardware design complications that need to be handled by additional circuit designs, leading to increases in design time and circuit costs. If the HDCP decryption process is entirely performed by software, i.e., by an operation unit through executing a program code, the HDCP decryption process may consume excessive resources of the operation unit and increase the load on the operation unit, hence much likely degrading performance of an electronic device.